Compiler-backed read-only Verilog and SystemVerilog project analysis.
is a local Model Context Protocol server that gives AI agents compiler-backed, read-only context for Verilog and SystemVerilog projects. It wraps so an MCP client can ask questions against parsed and elaborated HDL instead of plain text: What modules, interfaces, and packages are in this filelist? What diagnostics does the compiler frontend report? What is the instance hierarchy below this top?…
Inferred from the transports this listing declares (stdio). A client not listed here hasn’t been ruled out — it just isn’t something Forge can confirm.
Verification confirms publisher identity (repo ownership), not code safety. The security scan covers known CVEs and suspicious install scripts.
Forge read 0 source files from the published package tarball and matched no MCP tool registrations. Extraction is pattern-based over shipped source: a server that builds its tool list at runtime, or that ships only bundled or minified code, registers nothing this can see. Treat it as “not detected”, not as “exposes none”.
is a local Model Context Protocol server that gives AI agents compiler-backed, read-only context for Verilog and SystemVerilog projects. It wraps so an MCP client can ask questions against parsed and elaborated HDL instead of plain text: What modules, interfaces, and packages are in this filelist? What diagnostics does the compiler frontend report? What is the instance hierarchy below this top? Where is this symbol declared or referenced? Did my include paths, defines, and nested files resolve…
Forge's dependency resolver reads npm metadata only, so this PyPI package has no resolved tree. That is a gap in coverage, not a clean bill of health.